1. Field
The present invention relates to semiconductor apparatuses which controllably drive power devices. Specifically, the invention relates to a semiconductor apparatus that includes a substrate, on which a driver circuit for driving a main circuit and a bootstrap diode for charging an external bootstrap capacitor are integrated. The main circuit includes a series circuit including an upper-arm output device, exhibiting a high breakdown voltage and connected to a high-voltage power supply, and a lower-arm output device, exhibiting a high breakdown voltage and connected to the ground potential (GND).
2. Description of the Related Art
The power devices are used in inverters for driving a motor. The power devices are used widely also in many fields such as large-capacity plasma displays panels (PDPs), power supplies for liquid-crystal display, and inverters for household electric appliances such as air conditioners and illuminations.
The power devices have been driven and controlled by an electronic circuit constituted by combining semiconductor devices such as a photocoupler and electronic parts such as a transformer. However, based on the progress in the large-scale integrated circuit (LSI) technologies, high-breakdown-voltage integrated circuit apparatuses exhibiting a high breakdown voltage of up to 1200 V are put into practical use in these days.
The high-breakdown-voltage integrated circuit apparatus is constituted by integrating a high-side gate diver IC for a power device, a control circuit, and the power device on a semiconductor substrate. The high-breakdown-voltage integrated circuit apparatuses are classified into series to improve the efficiencies of the inverters and to reduce the component parts thereof.
FIG. 11 is a block circuit diagram describing a power module that constitutes an inverter for driving a motor and a main-circuit-driver circuit (cf. the following Patent Document 1). The power devices which drive three-phase motor 70 constitute a bridge circuit and housed in a package such that power module 71 is constituted.
In FIG. 11, power module 71 is constituted of power devices including insulated-gate bipolar transistors (hereinafter referred to as “IGBTs”) and diodes. MOSFETs may be used in substitution for the IGBTs with no problem. In FIG. 11, IGBTs Q1 through Q6 and diodes D1 through D6 are shown.
High-potential-side VCC2H of main power supply VCC2 is connected to the collectors of IGBTs Q1, Q2, and Q3. Low-potential-side VCC2L of main power supply VCC2 is connected to the emitters of IGBTs Q4, Q5, and Q6.
The gate of each IGBT is connected to the output from main-circuit-driver circuit 72. Input/output terminals I/O of main-circuit-driver circuit 72 are connected usually to a microcomputer. Outputs U, V, and W of an inverter constituted of power module 71 are connected to three-phase motor 70.
Main power supply VCC2 feeds a high AC voltage, usually from 100 V to 400 V. Especially when IGBTs Q4, Q5, and Q6 are in the OFF-states thereof but IGBTs Q1, Q2, and Q3 are in the ON-states thereof, the emitter potentials of IGBTs Q1, Q2, and Q3 are high.
Due to the potential scheme, the gates of IGBTs Q1, Q2, and Q3 should be driven by a voltage higher than the emitter potentials of IGBTs Q1, Q2, and Q3. Therefore, a photocoupler (PC) and a high-breakdown-voltage integrated circuit apparatus are used for main-circuit-driver circuit 72.
Usually, input/output terminals I/O of main-circuit-driver circuit 72 are connected to a microcomputer. The entire inverter circuit constituted of power module 71 is controlled by the microcomputer. Now an example of the high-breakdown-voltage integrated circuit apparatus will be described below.
FIG. 12 is a block diagram describing the arrangements of the constituent elements in the main-circuit-driver circuit.
Main-circuit-driver circuit 72 that constitutes the high-breakdown-voltage integrated circuit apparatus feeds and receives signals to and from the microcomputer via input/output terminals I/O. Main-circuit-driver circuit 72 includes control unit CU and gate driver units GDU. Control unit CU generates a control signal that makes a specific IGBT ON or OFF. Gate driver unit GDU receives the signal from control unit CU and drives the gate of the pertinent IGBT. Gate driver unit GDU detects an overcurrent caused in the pertinent IGBT and feeds an alarm signal to control unit CU.
Main-circuit-driver circuit 72 includes also a level shift unit LSU that mediates, between low-potential-level VCC2L and high-potential-level VCC2H, the gate signals and the alarm signals of IGBTs Q1, Q2, and Q3 connected to the high-potential-side of the bridge circuit in FIG. 11.
Gate driver unit GDU-U is connected to IGBT Q1, gate driver unit GDU-V to IGBT Q2, and gate driver unit GDU-W to IGBT Q3. Gate driver unit GDU-X is connected to IGBT Q4, gate driver unit GDU-Y to IGBT Q5, and gate driver unit GDU-Z to IGBT Q6.
Now level shift unit LSU in main-circuit-driver circuit 72 will be described below.
FIG. 13 is a block circuit diagram describing the fundamental structure of level shift unit LSU.
In the fundamental structure, n-channel MOSFET 61 exhibiting a high breakdown voltage, resistance RL1, p-channel MOSFET 62 exhibiting a high breakdown voltage, and resistance RL2 are used. The n-channel MOSFET 61 is used to shift the level of a signal from control unit CU to the levels of gate driver units GDU-U, GDU-Y, and GDU-W on high-potential-side VCC2H. The p-channel MOSFET 62 is used to shift the level of the alarm signal indicating an overcurrent and an overheat state to the level of control unit CU on low-potential-side VCC2L. Especially when the alarm signal indicating the detected overcurrent or the detected overheat caused in any of IGBTs Q1, Q2, and Q3 is designed not to be fed, p-channel MOSFET 62 will be unnecessary.
MOSFETs 61 and 62 used in level shift unit LSU are required to exhibit a breakdown voltage from 600 V to 1400, equivalent to the breakdown voltage of IGBTs Q1 through Q6 which drive three-phase motor 70.
Now a conventional high-breakdown-voltage gate driver that includes a bootstrap system formed on a semiconductor substrate (cf. the following Patent Document 2) will be described below.
FIG. 14 is a block circuit diagram describing the circuit configuration, in which gate driver units GDU-U and GDU-X in FIG. 12 which drive IGBT Q1 on the upper arm in FIG. 11, level shift unit LSU, and bootstrap diode Db are integrated into a chip.
FIG. 15 is a cross sectional view of a HV gate driver IC that includes an epitaxial substrate, on which a gate driver circuit and a bootstrap diode are integrated. Gate driver units GDU-V and GDU-W are constituted in the same manner.
In FIG. 14, the node for high-breakdown-voltage p-channel MOSFET 62 for detecting the overcurrent or the overheat caused in IGBT Q1 is not described. In FIG. 14, only the node of the level shift circuit on the level-up side of high-breakdown-voltage n-channel MOSFET 61 is described.
Now the operations of the bootstrap circuit will be described below.
A Vb voltage, which is the potential difference between a U-OUT pin and a U-VCC pin of the HV gate driver circuit, feeds a power supply to the high-side driver circuit. Usually, the Vb voltage is set to be around 15 V to securely enhance (turn ON and OFF) the external IGBTs (IGBTs Q1, Q2, and Q3) which the HV gate driver IC drives or the external MOSFETs.
The Vb voltage is the voltage of a floating power supply. In almost all the cases, the U-OUT voltage (V-OUT voltage, W-OUT voltage) having a square wave form at a high frequency is employed as a reference voltage. As shown in FIG. 14, the floating power supply is constituted of bootstrap diode Dd and bootstrap capacitor C1.
The bootstrap circuit works, when the U-OUT voltage drops to the ground potential in the state, in which a low-side IGBT (Q4) is in the ON-state thereof. Depending on the circuit configuration, the U-OUT voltage drops to the ground potential via the low-side IGBT or the load. As the U-OUT voltage drops to the ground potential, bootstrap capacitor C1 is charged by the VDD voltage, that is a low-voltage power supply of 15 V, via bootstrap diode Dd. As described above, a current is fed to bootstrap capacitor C1 from the VDD power supply so that the voltage of bootstrap capacitor C1, that is the Vb voltage of the floating power supply (high-side power supply), may be kept at the setting voltage (15 V).
In opposite, the U-OUT voltage is set to be equal to the U-VCC voltage or higher than the U-VCC voltage transiently due to a surge in the period, in which the gate of an IGBT (Q1) on the high-side is ON. Therefore, it is required for the reverse withstand voltage of bootstrap diode Db to be from 600 V to 1700 V, that is equivalent to the breakdown voltage of high-breakdown-voltage n-channel MOSFET 61.
Since it is necessary for bootstrap capacitor C1 to exhibit a large capacity of 100 nF or larger, it is difficult to integrate bootstrap capacitor C1. Therefore, an externally attached tantalum capacitor or an externally attached ceramic capacitor is used generally for bootstrap capacitor C1.
The following Patent Document 3 indicates that a pn-diode will be provided with a high breakdown voltage and hole leakage to the substrate will be reduced, if the pn-diode is formed using a silicon-on-insulator substrate (SOI substrate).
The following Patent Document 4 discloses a technique for forming a SON (silicon-on-nothing) structure. According to the disclosed technique, trenches are formed and aligned two-dimensionally in the surface of a silicon substrate and the silicon substrate is treated thermally to deform the trenches to a flat cavity. The disclosed technique prevents the manufacturing costs of the substrate from increasing and the reliability of the substrate from being impaired.
The following Patent Document 5 discloses a method for manufacturing a high-quality SON substrate with low manufacturing costs. The disclosed manufacturing method includes the first step of implanting ions for forming minute cavities in a desired region in a substrate, and the second step of thermally treating the substrate including the minute cavities formed therein. The second step of thermally treating is a step of exposing the substrate to a temperature of 1000° C. or higher. The Patent Document 5 discloses also a method of manufacturing a semiconductor apparatus exhibiting excellent performances, in which the manufacture of the SON substrate is inserted into the process of manufacturing the semiconductor apparatus.